1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to the validating of test signal connections within an integrated circuit.
2. Description of the Prior Art
It is known to provide testing mechanisms within an integrated circuit which may be used for test purposes, such as manufacturing tests. Accordingly, it is known to provide a functional block of circuitry with associated test circuitry, such as a wrapper serial scan chain.
There is also a trend toward more system-on-chip designs whereby multiple functional blocks of circuitry are combined on a single integrated circuit to produce an overall system. In this context, it is often the case that different organisations will be responsible for the design of different functional blocks of circuitry. These designs may be supplied separately to the organisation which will then integrate them together to produce the system-on-chip integrated circuit and manufacture that integrated circuit.
A problem that arises in this context is that the organisations which supply the designs of functional blocks of circuitry may seek to protect their designs by releasing them an encrypted form which places restrictions upon the modification of those designs and seeks to prevent detailed information concerning those designs being made public. In order that the system-on-chip integrator may test their product it is known for the supplier of the functional block of circuitry to also supply a set of test vectors (sets of signal values) which may be applied to that functional block of circuitry to test it for correct operation. In order for this testing to operate, the system-on-chip integrator must provide correct and properly functional connections to the test mechanisms built into the functional block of circuitry such that the supplied set of test vectors may properly reach those testing mechanisms and be read from those testing mechanisms. It is accordingly important that the system-on-chip integrator should be able to validate their system-on-chip design in respect of the connections to the testing mechanisms of the functional block of circuitry. One way of achieving this would be to supply the system-on-chip integrator with an encrypted model of the circuit including the testing mechanisms which could be validated using standard validation tools. However, there is a considerable variation in the way different testing mechanisms may be set up for different individual designs and accordingly this involves the originator of the functional block of circuitry having to produce many different encrypted functional models. Furthermore, there are risks associated with the use of encryption in protecting important information as unauthorised decryption techniques might be able to access the confidential design information without the originator being able to stop this.